Efficient microprocessor design using machine learning

Funding: 
FWO
Period: 
1 January, 2008 to 31 December, 2011

Participants:

  • Hendrik Blockeel

Microprocessor design is a very time-consuming and complex task. The question the designer needs to address is how to use hundreds of millions of transistors to yield maximum performance for a given power budget, temperature budget, chip area budget, etc. This involves exploring a huge space of possible designs. The goal of this research project is to drastically reduce the time spent during the microprocessor design space exploration. Current approaches use a brute force approach that requires many simulations to be run on a cluster of machines. In this project, we propose a more fundamental approach, based on machine learning, that computer architects can use to drive the design space exploration. The end goal is a faster and more efficient design space exploration methodology.

Group: